Product Summary

The K9F2G08U0C-SCB0 is a 2G-bit NAND Flash Memory with spare 64M-bit. The K9F2G08U0C-SCB0’s NAND cell provides the most costeffective solution for the solid state application market. A program operation can be performed in typical 200μs on the (2K+64)Byte page and an erase operation can be performed in typical 1.5ms on a (128K+4K)Byte block. Data in the data register can be read out at 25ns(42ns with 1.8V device) cycle time per Byte. The I/O pins serve as the ports for address and data input/output as well as command input.

Parametrics

K9F2G08U0C-SCB0 absolute maximum ratings: (1)Voltage on any pin relative to VSS, VCC: -0.6 to +4.6V; VIN: -0.6 to +4.6 V; VI/O: -0.6 to Vcc +0.3 (< 4.6V); (2)Temperature Under Bias, TBIAS: -40 to +125℃; (3)Storage Temperature, TSTG: -65 to +150℃; (4)Short Circuit Current, IOS: 5 mA.

Features

K9F2G08U0C-SCB0 features: (1)Voltage Supply, 1.65V to 1.95V; 2.70V to 3.60V; (2)Organization, Memory Cell Array: (256M + 8M) x 8bit; Data Register: (2K + 64) x 8bit; (3)Automatic Program and Erase, Page Program: (2K + 64)Byte; Block Erase: (128K + 4K)Byte; (4)Page Read Operation, Page Size: (2K + 64)Byte; Random Read: 25μs(Max.); Serial Access: 25ns(Min.); (5)Fast Write Cycle Time, Page Program time: 200μs(Typ.); Block Erase Time: 1.5ms(Typ.); (6)Command/Address/Data Multiplexed I/O Port; (7)Hardware Data Protection, Program/Erase Lockout During Power Transitions; (8)Reliable CMOS Floating-Gate Technology, Endurance: 100K Program/Erase Cycles(with 1bit/512ByteECC), Data Retention: 10 Years; (9)Command Driven Operation; (10)Intelligent Copy-Back with internal 1bit/528Byte EDC; (11)Unique ID for Copyright Protection.

Diagrams

K9F2G08U0C-SCB0 block diagram

K9F2808Q0C-DCB0
K9F2808Q0C-DCB0

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K9F2808U0B-D
K9F2808U0B-D

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K9F2808U0B-V
K9F2808U0B-V

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K9F2808U0B-Y
K9F2808U0B-Y

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K9F2808U0C
K9F2808U0C

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K9F2808U0C-DCB0
K9F2808U0C-DCB0

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Negotiable