Product Summary
The HEF4027BP is a dual JK flip-flop. The HEF4027BP is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct (CD) and set-direct (SD) are independent and override the J, K, and CP inputs. The outputs are buffered for best system performance. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. The applications of the HEF4027BP include Registers, Counters, Control circuits.
Parametrics
HEF4027BP aboslute maximum ratings: (1)supply voltage, VDD: -0.5 to +18 V; (2)input clamping current, IIK: ±10 mA; (3)input voltage, VI: 0.5 to VDD +0.5 V; (4)output clamping current, IOK: ±10 mA; (5)input/output current, II/O: ±10 mA; (6)supply current, IDD: 50 mA; (7)storage temperature, Tstg: -65 to +150℃; (8)ambient temperature in free air, Tamb: -40 to +85℃; (9)total power dissipation Tamb, Ptot: -40℃ to +125℃, DIP16 package: 750 mW; SO16 package: 500 mW; (10)power dissipation, P: 100 mW.
Features
HEF4027BP features: (1)Fully static operation; (2)5 V, 10 V, and 15 V parametric ratings; (3)Standardized symmetrical output characteristics; (4)Operates across the full industrial temperature range -40℃ to +85℃; (5)Complies with JEDEC standard JESD 13-B; (6)ESD protection: HBM JESD22-A114E exceeds 2000 V; MM JESD22-A115-A exceeds 200 V.
Diagrams
<IMG border=0 alt="HEF4027BP block diagram" src="http://www.seekic.com/uploadfile/ic-mfg/2012102944016907.jpg">
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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HEF4027BP,652 |
NXP Semiconductors |
Flip Flops DUAL JK FLIP-FLOP |
Data Sheet |
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