Product Summary

The EM636165TS-7G is a high-speed CMOS synchronous DRAM containing 16 Mbits. It is internally configured as a dual 512K x 16 bit DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 16 bit bank is organized as 2048 rows by 256 columns by 16 bits. Read and write accesses to the EM636165TS-7G are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence.

Parametrics

EM636165TS-7G absolute maximum ratings: (1)Input, Output Voltage, VIN, VOUT: - 1.0 to 4.6 V; (2)Power Supply Voltage, VDD, VDDQ: -1.0 to 4.6 V; (3)Operating Temperature, TOPR: 0 to 70℃; (4)Storage Temperature, TSTG: -55 to 125℃; (5)Power Dissipation, PD: 1W; (6)Short Circuit Output Current, IOUT: 50 mA.

Features

EM636165TS-7G features: (1)Fast access time: 4.5/5/5/5.5/6.5/7.5 ns; (2)Fast clock rate: 200/183/166/143/125/100 MHz; (3)Self refresh mode: standard and low power; (4)Fully synchronous operation; (5)Internal pipelined architecture; (6)512K x 16 bit x 2-bank; (7)Programmable Mode registers, CAS# Latency: 1, 2, or 3; Burst Length: 1, 2, 4, 8, or full page; Burst Type: interleaved or linear burst; Burst stop function; (8)Individual byte controlled by LDQM and UDQM; (9)Auto Refresh and Self Refresh; (10)4096 refresh cycles/64ms; (11)CKE power down mode; (12)Single +3.3V?.3V power supply; (13)Interface: LVTTL; (14)50-pin 400 mil plastic TSOP II package; (15)60-Ball, 6.4 mm x 10.1 mm VFBGA package (Max total package height=1.0 mm).

Diagrams

EM636165TS-7G block diagram

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